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I2C Debug Console

Plug in any I2C part and read or write it on the spot

Page 31 of 31 MCP / API open OTA updates

This page and page 20 divide the work: page 20 discovers devices, page 31 talks to them. It supports register reads of any length, pure reads (no register address sent, ideal for FIFO-style parts), burst writes, single-address ping with timing, and timed continuous monitoring of one register. The screen shows a nine-line transaction log (reads cyan, writes amber, NACK red, probes green) plus live SDA/SCL levels.

The transaction ring keeps the last 48 operations for console review, so bringing up a new part does not require a scope to find out whether it is acknowledging at all.

Screen

On-screen interface

A recreation of this page on the 2.41-inch AMOLED display (600 Γ— 450). Actual interaction and layout follow the latest firmware.

I2C Debug 0x51 Β· 400 kHz
0x51[0x00]12 34 56 78 9A BC
W0x51 [0x02] ← 10 20
Read0x51 [0x00] β†’ 12 34 56 78
Read0x51 [0x00] β†’ 12 34 56 79
P0x51 ACK Β· 312 Β΅s
E0x52 NACK
W0x51 [0x02] ← 10 21
Read0x51 [0x00] β†’ 12 34 56 7A
P0x51 ACK Β· 298 Β΅s
Read0x51 [0x0F] β†’ E8
Tx ring48 entries Β· reviewable
Bus levelsSDA High / SCL High
Online devices0x20 0x38 0x51 0x6B
Screen Β· Page 31
Recreated from the real firmware layout; the display type can be changed in the admin panel
Highlights

Key capabilities

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Read any length

rb <addr> <reg> [count] pulls a whole block at once.

✍️

Burst writes

wb sends several bytes β€” an init sequence in one command.

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Continuous monitor

mon samples one register on a timer to see when it changes.

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Nine-line log

Read/write/NACK/probe colour-coded, 48 entries back.

Specifications

Technical specs

Register readi2c rb <addr> <reg> [n]
Pure readi2c rx <addr> [n] (no register address)
Writei2c wb <addr> <reg> <b0> <b1> …
Clock100 / 400 / 1000 kHz, restored to 100 kHz on leaving the page
Use Cases

Typical scenarios

Register forensics

Suspect a config write failed? Read it straight back.

Bring-up self-test

Ping for ACK, then walk the ID and status registers.

Commands

Related commands

page 31  Jump to the I2C debug console
i2c rb 0x51 0x00 8  Read 8 bytes from register 0x00 of 0x51
i2c rx 0x51 4  Pure read of 4 bytes
i2c wb 0x51 0x02 0x10 0x20  Burst write two bytes
i2c ping 0x51  Probe an address and report timing
i2c mon 0x51 0x00 2 500  Monitor 2 bytes every 500 ms
i2c log 20  Show the last 20 transactions
i2c pull  Read SDA/SCL levels

Read the full API & command reference β†’

⚠ Boundaries & notes
  • The bus is shared with the on-board touch controller, IMU and RTC (0x20/0x38/0x51/0x6B) β€” check for address conflicts before writing.
  • Raising the bus clock affects the on-board parts; leaving the page restores 100 kHz automatically.

Other feature pages